Professor De Boer's list of
TEXTBOOK ERRATA
(last update 4/20/2012)


Mano and Kime, Logic and Computer Design Fundamentals, Third Edition,
ISBN 0-13-140539-X, Pearson Prentice Hall, 2004.

(link to errata for the 5th edition)
(link to errata for the 4th edition)

Before using the list below review the publisher's errata list.
Pearson Prentice Hall has withdrawn their errata list.
You may be able to find it via a web search. A typical file name was "Text_Errata_v4.3.pdf". Or you might find it in the Internet archive.
Those errata are not included in the list below unless noted.

In addition, the errata listed below have been found.

Page 18, Eleven lines (about 2 inches) from the bottom of the page.
Change "Table 1-2 on page 12" to "Table 1.3 on page 19."
(Posted 1/20/2011)

Page 27, Problem 1-8.
The answer given online at the publisher's web site has errors of precision. The correct answers are:
a.) 16612.346 8
b.) 792.41D16
c.) 1010 1111.0010 1100 112                                             (Posted 1/25/2008)

Page 83, Problem 2-12.
The answer given online at the publisher's web site has an error in it. The error is in the answer for the p.o.s. form in part (b). The correct answer is (the same as the s.o.p. form.)

Page 133, Problem 3-1. (Also noted on publisher's errata sheet)
The second function should be labeled G, not F.
(Change the second F to a G.)
(Also noted in publisher's errata.)

Page 138-9, Problems 3-24, 3-25.
The publisher's errata (see link above) is not sufficient guidance for students. Students should use the datasheet and truth table for the type '139 2-to-4 decoder, for example the one from Fairchild Semiconductor (shows symbols similar to Figure 3-34) or Texas Instruments (Page 2 of this datasheet has a complete schematic at the gate level of the two 2-to-4 decoders shown in Figure 3-34, including the "bubbles.") to decipher the logical function of a 2-to-4 decoder.

Note that Y1 = O1 = D1,   Y2 = O2 = D2,  etc.

Also note that the truth tables given in datasheets typically refer to signals such as 1. (Notice the overbar.) That label refers to the signal present on the wire that connects outside the bubble—in other words, it is the label for the pin of the chip. The same label, when it is shown inside the schematic box representing the function of the chip does not include the overbar but there will be a bubble or arrow symbol on the output line in place of the overbar.

(Further detail: Since students have typically not yet studied decoders, they refer to the index and typically zero in on Figure 4-10. But the use of "bubbles" for negation in Figure 3-34 makes Figure 4-10 nearly impossible for students to apply correctly since it is not literally the gate-level circuit for each decoder in Figure 3-34. Instead of looking at Figure 4-10 at this time, students learn better if they consult an actual datasheet.)


Page 196, Problem 4-36.
Replace   "E_n, A0, A1"   with   "E_n, A1, A0."

(It is conventional in this text to list the most significant bits first. Doing it in the other order confuses students.)

Page 236, Problem 5-4.
Add these instructions for working the problem. . .
Work the problem in this order:

1) The given numbers are unsigned binary. Pad each with zeros until
     they are each 8-bits wide.

2) Negate subtrahends by taking the 2's complement.

3) Add.

4) For each case, note "overflow" or "no overflow" as
    the case may be.

(Several of the given unsigned numbers are too large in magnitude to properly represent as signed integers with the same number of bits. That "correct" answers can be obtained in these instances by using the methods shown in some examples in the textbook is only because people can interpret the bits in the context of a modular number system. Digital hardware does not act like that. The four-step method described above emulates what 8-bit digital hardware would do to add the numbers.)

Page 246 and p247, Labels and   (Also noted on publisher's errata sheet.)
Labels for the Latch are missing overbars in four places inside Figure 6-6. The same problem exists in three places in the text that discusses this Figure.

Page 246, 9 lines from the bottom, add overbar to S.
Page 246, 8 lines from the bottom, add overbar to S.
Page 246, 7 lines from the bottom, add overbar to R.
(Other instances of S and R on these pages are correct as printed with or without the overbars. This errata is also noted in the publisher's errata file.)

Page 250-283, Figures and a table containing latches
Specifically, Figures 6-10, 6-12, 6-13, 6-14, 6-15, 6-17, 6-18, 6-23, 6-27, Table 6-7.

To be consistent with symbols used in Chapter 9 (e.g. Figure 9-4) add label Q at each output inside the block diagram symbol for each latch.

Also note the publisher's errata for figure 6-14, the last two symbols in part (b).

A note to students on block symbols: The absence of a name in the block diagram symbol, along with no postponement symbols or dynamic symbol, implies a latch. Postponement or dynamic symbols are used to imply a master-slave or edge- triggered flip-flop, as shown in Figure 6-14 and described on page 255.


Page 301, Problem 6-9. (Also noted on the publisher's errata sheet)
Place an asterisk at the start of the word "Draw."
(The answer is posted on the web.)

Page 330, Table 7-7. (Also noted on the publisher's errata sheet)
Change "Figure 7-7" to "Figure 7-11".

Page 336, Figure 7-14.
Note the errata for this figure described in the author's list of errata. A corrected figure is shown here.

Page 393, Figure 8-18.
Add a key showing input and output variables. The key will show a circle representing a generic state. A state name will appear in the top half of the circle and the outputs (for example Z1 Z2) will appear in the bottom half. An arrow representing a state transition will extend from the circle and the inputs (for example X1 X2) will be labeled along the arrow. See this corrected figure.

Page 447 Table 10-6. (Also noted on the publisher's errata sheet)
In the line with the micro-operation "R7 R7 + 1" and in the column "MB," change the word "Register" to a dash.

Page 447 Table 10-7. (Also noted on the publisher's errata sheet.)
In the line with the micro-operation "R7 R7 + 1" and in the column "MB," change the "0" to an "X".

Page 477 Problem 10-9.
Add this sentence at the end of the problem:
"For all arithmetic operations assume the data is in the twos complement format."
(Posted 4/23/07. Mentioned in class 4/18/2007.)

Page 479-480 Problem 10-16.
Part (a), in the first row in the table below the heading,
             change the "=" to a left-arrow.
Part (a), in the last row, in the second-to-last line,
             change "PC + se PC" to "PC + se AD".
Part (b), in the first row below the heading, change the "=" to a left-arrow.

Page 496, About five lines below the middle of the page.
In the line that starts, "Figure 11-5, with the mode feild. . ."
The figure number is incorrect. Change "Figure 11-5. . ."
to "Figure 11-6. . ." (posted 4/20/2009 Thanks for catching this one Lucas!)

Page 506 Descriptions of shift operations
There are a number of omissions in the description of shift operations. An improved version of the text on page 506 under the heading "Shift Instructions" can be found here, and here is a supplemental figure to further clarify this matter.
These are the most substantive of the changes made in the improved text linked above:
          Line 8 (starts with "the") Insert these sentences after the existing period: "It shifts the out-going bit into the carry flag bit. The old carry flag bit is overwritten."
          Line 9. (starts with "shifting two's") Replace the word "shifting" with the phrase, "multiplying and dividing" and at the end of that sentence add the words "by two" just before the period.
          Line 12. (starts with "unchanged") Insert these sentences after the existing period: "The outgoing bit is shifted into the carry flag bit. This operation divides the number in the register by two."
          Line 18. (starts with "the") After the existing period insert this sentence: "The outgoing bit is also copied into the carry flag bit."
          The line numbers above are counted down from the heading "Shift Instructions" in the original text and do not count blank lines.
Page 512 Table 11-7.
No errata, however Table 11-7 has little content.
Here is a supplement to Table 11-7.

Page 515 Table 11-9. (Also shown on the publisher's errata sheet)
Two lines in the middle of the table are incorrectly shown in the text as:
  Branch if lower BL A < B C = 1
  Branch if lower or equal BLE A B C + Z = 1

Correct the above lines by replacing "lower" with "below" and "BL" with "BB" in several places. The corrected lines read as follows:
  Branch if below BB A < B C = 1
  Branch if below or equal BBE A B C + Z = 1

(As written the same instruction mnemonic, "BL," stands for two separate and unique instructions. The "BL" instruction in table 11-9 is not the same as the "BL" instruction shown table 11-10. Similarly for "BLE."
Page 522. Problem 11-1. (Also shown on the publisher's errata sheet)
Change "Section 11-1" to "Section 11-2". Also add The text indented below:
SUB and DIV are not described in section 11-2. They work as described below:

Three Address Instructions:
SUB R1, R2, R3      R1 R2 – R3
DIV  R1, R2, R3      R1 R2/R3

Two Address Instructions:
SUB T1, T2            M[T1] M[T1] – M[T2]
DIV  T1, T2            M[T1] M[T1]/M[T2]

One Address Instructions:
SUB X                   ACC ACC – M[X]
DIV X                    ACC ACC/M[X]


Page 522. Problem 11-4. (Also shown on the publisher's errata sheet)
Add "Y = " to the start of the expression so that it reads:
"Y = (A + B) × C ÷ (D – (E × F))"

Page 524. Problem *11-17.
Professor De Boer requests that you use definitions for shift instructions that are typical of actual instruction set architectures. In the solution posted by the publisher on the web, the correct answer is given in the comment. Specifically, the C column will be 110000000 (from top to bottom) and the last two lines of the table will include "RORC 00110100" and "ROLC 01101000." (The rest of the table is correct as shown on the publisher's web page.)

Page 526. Problem *11-27.
Change the address location of the two word procedure call instruction from. . .
"A two-word procedure call instruction is located in memory at address 2000, followed by the address field of 0301 at location 2001."

to. . .
"A two-word procedure call instruction located in memory at address 1000, followed by the address field of 0301 at location 1001."

Also change the solution shown on the textbook's companion web site to: 
 
                              PC     SP     TOS
           a) Initially      1000   2000   3000
           b) After Call     0301   1999   1002
           c) After Return   1002   2000   3000
(As written this problem would execute code stored on the stack. This is not typical and could mislead students as to what a stack is typically used for. The changes mentioned above solve this problem.)
(This errata was updated on 5/02/07)
Disclaimer: This list of errata is provided by Professor De Boer for the use of his students in his courses. Professor De Boer has no connection to the book's publisher or the authors of the textbook, other than that he has reported these errata to the authors. This list is offered as is, with no guarantee of any kind. It is likely to be incomplete at the least.

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