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Further discussion of problem 5-12 The heart of this problem has to do with what happens when power is initially applied. What initial state will the circuit assume and how will that happen? The text discusses this matter starting on page 232 near the bottom of the page, the paragraph that starts, "When the power in a digital system is first turned on. . ." and continuing up to Example 5-3 on page 233. The reset signal discussed in this part of the textbook is active when the power is first applied. After the power is stable (at +5 volts for example) and the clock has been running properly for at least a few cycles (the clock itself usually will not run correctly if the power is not stable) then the reset signal automatically changes to be not active and normal operation of the state machine begins from a known state that was forced by the reset signal. Most power supply circuits provide a reset signal like this. In problem 5-12 a schematic is given. A new input labeled R (for "reset") needs to be added. This signal needs to connect into the schematic through wires with or without other changes. You could for example add a "reset" input to each of the flip-flops. (See the discussion in the text titled "Direct Inputs" starting on page 221.) You could change the number of inputs on some of the gates. (For example, change a 2-input gate to a 3-input gate and connect R to the new gate input.) You may add new gates to the next-state logic. You may even re-design the next state logic entirely if this is the easiest approach for you.
Although the final designs for parts a and b each
call for different logic diagrams, each should function the same
as the given design when R is not active, but should go to
the assigned state (given in the problem statement) and stay
there regardless of X when R is active. The
problem statement specifies that for part a, R is
active when (Use your browser's back arrow or Alt-LeftArrow to return to the web page you were previously viewing.) |