DORDT COLLEGE ENGINEERING DEPARTMENT
INTRODUCTION TO MICROPROCESSORS AND DIGITAL CIRCUITS--EGR 204
(Spring 2009)

PROBLEM SETS

(Last update: 5/02/2009 5:28 pm)
PS
#  
Assigned Due Returned Problems Assigned
(In Mano & Kime unless otherwise noted)
--

5/01 ---
---

---
  Last day of class—no new assignment.
  After peer grading we will review for the exam.
38

4/29 5/01

5/01
at
5:00 pm


5/01
at
about
3 pm
  Read 12-1, 12-2, 12-4, and these web pages on
  zoned recording and logical block addressing.
 
  Do 12-1*, 12-3, And answer this question:
 
  12-A What are the advantages of packet-based
  I/O such as in USB?
 
  Note errata on page 601.
  Note errata on problem 12-1*.
 
  This assignment will be due for regular grading
  at 5 PM on Friday. Place your homework in a box
  that will be placed near Prof. De Boer's office
  door. The box will be labeled "EGR 204
  Homework." This assignment will be graded and
  placed in the plastic bin for "De Boer's
  Courses" by noon on Saturday. You may then
  pick up your homework at your convenience on
  Saturday afternoon.
37

4/27 4/29
5/01

5/01
at
about
3 pm
  Review 10-5, Read 10-9, 10-10
  Do 10-27*, 10-29
 
  Note errata on problem 10-27*.
 
  This assignment will be graded and placed in
  the plastic bin labeled "De Boer's Courses" by
  noon on Saturday. You may pick up your
  homework at your convenience on Saturday
  afternoon.
36

4/24 4/27
4/29

5/01
  Read 10-8
  Do 10-23*, 10-24, 10-25*
 
  Hint: For Problem 10-23* assume that the
  "16" bit register is named "R".
  Also, this supplement written for an older
  edition of our text can be helpful to
  understanding table 10-7 in our text. (The
  example in the supplement assumes an 8-bit
  register, not a 16-bit register. Be sure to
  make the appropriate change.)
 
  Hint: For Problem 10-25* a computer does
  subtraction A – B as A + Bbar +1 (details: text
  page 345) and assumes the numbers are twos
  complement signed integers. Then "borrow" is
  the NOT of the carry out of that addtion. This
  borrow is saved in the carry flag bit in the
  place of the normal carry bit.
35

4/22 4/24 4/27
4/29
  Read 10-7
  Do 10-18, 10-20*, 10-21
 
  Note: On 10-18 work the problem in base ten
  using 13 places right of the radix point.
 
  Note: On 10-20* the answer posted on the web
  is wrong. The meaning of E is incorrect on the
  first and last lines. You should list all the
  binary bit patterns possible (e in binary) and
  the value of the exponent (E in decimal) in
  a style similar to the outer two columns of
  Table 10-6 on page 526. Also note carefully
  the text underneath Table 10-6.
 
  Note: On 10-21 for part (b) list
  E = (the smallest), -1, 0, 1, and (the largest)
  values possible. On part (c) the calcuation
  should be an estimate in base ten and in
  scientific notation, to at least three significant
  figures of the largest and smallest positive
  normalized numbers.
34

4/20 4/22
4/24

4/27
  Read 10-5, 10-6
  Do 10-3*, 10-4, 10-17*
33

4/17 4/20
4/22

4/24
  Read 10-3, 10-4
  Do 10-5, 10-6*, 10-7
 
  Note errata on page 510
32

4/15 4/17
4/20

4/22
  Read 10-1, 10-2
  Do 10-1, 10-2*
 
  Hint: You might find it easier to work on
  10-2* first.
 
  For both 10-1 and 10-2*,
  SUB and DIV are not described in the text.
  Some examples are shown below:
 
  Three Address Instructions:
  SUB R1, R2, R3      R1 R2 – R3
  DIV  R1, R2, R3      R1 R2/R3
 
  Two Address Instructions:
  SUB T1, T2            M[T1] M[T1] – M[T2]
  DIV  T1, T2            M[T1] M[T1]/M[T2]
 
  One Address Instructions:
  SUB X                   ACC ACCM[X]
  DIV X                    ACC ACC/M[X]
 
  Hint for 10-2: Part (b) requires only two
  temporary memory variables.
 
  Note errata on page 499
31

4/13 4/15
4/17

4/20
  Read 9-7, 9-8, 9-10
  Do 9-12, 9-15
 
  Hints for problem 9-15:
  It might be easier to do part (b) first.
 
  For part (a) fill unused fields with "X" for
  "don't care." Note that address fields are the
  only kind that can be unused since Figure 9-6
  shows explicit logic for the other fields.
 
  For part (a), line 3, in "R[5] + 2" the "2" arrives
  from the "Constant in" lines to MUX B. (See
  Figure 9-15 on page 471.)
 
  In part (a) line 5 the "PC + se PC" should be
  "PC + se AD". Also let AD = 25 (base ten--
  convert it to binary). The value of AD is supplied
  in a pair of fields, split to "Left" and "Right." The
  left is most significant. This forms effectively a
  six-bit field. (See Figure 9-14 on page 467.)
 
  Note errata on problems 9-12 and 9-15.
30

4/10 4/13
4/15

4/17
  Read 9-4, 9-5, 9-6
  Do 9-8*, 9-9
 
  Hints on problem 9-9:
  Zero can be formed as the exclusive OR of two
  identical words. For example, R0 XOR R0 = 0.
 
  Assume numbers are signed integers in the twos
  complement number system. Then
                    _
        X - Y = X + Y + 1

  It is possible that some bits in the control
  word do not matter. Mark those as "X" for
  "Don't Care"
 
  Although 9-10* is not assigned, understanding
  that problem and its solution (posted on the
  web) might help you understand and do 9-9.
29

4/08 4/10
4/13

4/15
  Read 9-1, 9-2, 9-3
  Do 9-1, 9-2*
 
  Note: In 9-1, "selection lines" refers to
  "Destination Select," "A Select," and "B Select"
 
  Note: For problem 9-2* assume the ALU is
  designed to work with numbers in twos
  complement format. Overflow detection is
  described on page 165 of your text. The result
  of your logic should be that N = 1 iff the
  output of the ALU represents a negative number.
  Bit Z = 1 iff the output represents zero.
  Bit V = 1 iff there was an overflow.
  Bit C = 1 iff there was a carry out of
  the most significant place.
28

4/06 4/08
4/10

4/13
  Read 8-6, 8-7, 8-8
  Do 8-9, 8-10, 8-11
27

4/03 4/06
4/08

4/10
  Read 8-4, 8-5
  Do 8-7, 8.8*
  Note errata on problems 8-7 and 8-8 .
26

4/01 4/03
4/06

4/08
  Read 8-1, 8-2, 8-3
  Do 8-1*, 8-2, 8-3* EXCEPT change
  "64K X 16" to "1 M x 4" and change
  "32000" to "196865." Note: The solution
  given online goes with the problem as printed
  in the textbook. The assignment is to re-work
  the problem with the organization and address
  given here.
25

3/30 4/01
4/03

4/06
  Read Ch 7 Sec 7-7, 7-8, 7-14
  Do 7-11* Note errata on p404, Problem 7-11*
                 Note Figure 7-15 too.
  7-16 and use hierarcy including a diagram of a
                 single cell of the register.
24

3/27 3/30
4/01

4/03
  Read Ch 7 Sec 7-6 from "Shift Registers" on
  page 353 through the end of the Section.
  Do 7-4*, 7-5*, 7-8
23

3/25 3/27
3/30

4/01
  Read Ch 7 Sec 7-5, 7-6 up to "Shift Registers"
  on page 353.
  Do 7-3, 7-B
 
  P.S. Check the dates on this assignment and
  the next one. Professor De Boer has posted
  this one early.
 
  Note: Until 10:23 am on Monday, 3/30, the final
  due date was incorrectly shown as 3/31.
22

3/09 3/25
3/27

3/30
  Read Ch 7 Sec 7-1, 7-2, 7-3
  Do 7-A (click on link).
  Here is a datasheet for the '175 (problem 7-A).
  See especilly the function table on page 3 and
  the block diagram on the right side of page 3.
--

3/09 ---
---

 
 
  Study for the test on Wednesday, 3/11.
21

3/06 3/09
3/25

3/27
  Read Ch 6 Sec 6-3, 6-8
 
  Do 6-9.  Answers should be in the style of. . .
  "Signal RX at X ns has a <name problem>."
  Hint: The times mentioned in the answers always
  correspond to a clock edge.
 
  6-15 and also specify how to connect the inputs
  X, Y, and Z to the ROM and how to connect the
  outputs A, B, C, and D to the ROM.
  (Note errata on 6-15),
 
  6-20 except mark fuses to remain intact on the
  fuse map for a TIBPAL16L8-25C part. The fuse
  map can be found on page 5 of the datasheet.
 
  Hint 1) The output pins of the TIBPAL16L8-25C
  are driven by inverters. You need to build the
  complementary function into the array in order
  to get correct outputs at the pins.
 
  Hint 2) If you put an "X" mark on an AND gate
  it signifies that all the fuses on all the
  inputs for that AND gate should remain intact.
  This forces the output of that AND gate to be
  logic-0 always.
 
  Hint 3) Tie pin 1 to ground. Use that input to
  enable outputs.
 
  Note: First draft of lab report is due 3/09.
20

3/04 3/06
3/09

3/25
  Read Ch 5 Sec 5-7, 5-10
 
  Do 5-35 using this state assignment:
  A = 00, B = 01, C = 10, D = 11
  Note that the problem statement continues on
  page 291 underneath Figure 5-45.
 
  Note errata on page 251.
  Note errata on pages 254, and 259
19

3/02 3/04
3/06

3/09
  Review Ch 5 Sec 5-5 up to page 240.
  Read Ch 5 Sec 5-5 from page 240 to the end.
  Do 5-12, 5-13*
  Note errata on page 243.
  Note: Discussion of Problem 5-12
18

2/27 3/02
3/04

3/06
  Read Ch 5 Sec 5.5 up to
  "Designing With D Flip-Flops" on page 240.
  Do 5-9, 5-11*
17

2/25 2/27
3/02

3/04
  Review Ch 5 Sec 5-3, Read Ch 5 Sec 5-4
  Do these problems:
 
  5-A. Draw a gate-level logic diagram of the SR
  master-slave flip-flop shown in Figure 5-9 on
  page 216. (Note Figure 5-7 on page 213.)
 
  5-B. (Click on the link.)
 
  5-6 (On page 281 in your text.)
16

2/23 2/25
2/27

3/02
  Read Ch 5 Sec 5-3
  Do 5-4
15

2/20 2/23
2/25

2/27
  Read Ch 5 Sec 5-1, 5-2
  Do 5-1, 5-2.
  Note: For these problems use the input
  sequences given in the tables below. Fill in
  the outputs shown on these tables. The
  complete table or the equivalent information
  in a vector waveform file print-out is the
  answer.

  _  _      _                      _
  S  R | Q  Q         C  S  R | Q  Q
  -----+-----         --------+-----
  1  1 |              0  0  0 |     
  1  0 |              0  0  1 | 
  0  1 |              0  1  0 | 
  1  1 |              0  1  1 | 
  0  1 |              1  0  1 | 
  0  0 |              1  0  0 | 
  0  1 |              1  1  0 | 
                      1  0  0 | 
  Table for 5-1       1  1  0 | 
                      1  1  1 | 
                      1  1  0 | 
                      1  1  1 | 
                      1  0  0 | 
                                
                      Table for 5-2
  Optional supplemental reading: RS Nand Latches.
14

2/18 2/20
2/23

2/25
  Read Ch 4 Sec 4-6, 4-7, 4-9
  Do 4-23
 
  Hint: Although 4-20* is not assigned, look at
  that problem statement and its solution which
  is posted on the web.
 
  Another Hint: The sentence, "Note that
  complemented inputs are available." means that
  although the signal a_n is a separate input
  from a, you should assume that a_n is always
  the logical not of a. Wherever you might like
  to use A_bar you should instead use the signal a_n.
  The same goes for the other similarly named
  pairs of signals.
13

2/16 2/18
2/20

2/23
  Read Ch 4 Sec 4-5
  Do 4-4 except do it in this order:
    1.) The given numbers are unsigned binary.
          Pad each with leading zeros until it is
          eight bits wide. This converts the
          numbers from unsigned binary to signed
          two's complement (and all of them are
          positive).
    2.) Negate subtrahends by taking the
          two's complement.
    3.) Add. The result is the answer without
          any further manipulation. The answer is
          in the two's complement notation.
    4.) For each case, note if there is
          "overflow" or "no overflow."
 
  4-45 Note: this problem is not in the
  textbook, click the link to view it.
12

2/11 2/16
2/18

2/20
  Read the due dates of this assignment carefully
  Maybe you should be working on PS#11 instead.
 
  Read Ch 4 Sec 4-4
  Do 4-2* (Use manual verification),
 
  4-3* and note errata on 4-3*
  Also for each note if there is overflow or not.
 
  Definition: Overflow upon negation occurs iff
  negating a non-zero number does not change
  the sign of the number.
 
  Note that by definition the number zero cannot
  overflow upon negation. (–0 = +0 = 0)
 
  Note: In 4-3* the given numbers are mostly
  negative since most start with a 1 bit.
 
  Note errata on Page 166
11

2/09 2/13
2/16

2/18
  Read Ch 4 Sec 4-1, 4-2, 4-3
  Do 4-1 except begin with a truth table, then
  use K-maps to derive equations for outputs
  C2, S1, and S0. Stop with equations in SOP form
  since drawing a schematic will be too tedious.
  Note that the inputs are A1, A0, B1, B0, and C0.
  You will need five-variable K-maps for this
  problem. Hint: Drawing the K-maps in a
  horizontal style works best for this problem.
 
  FYI "Karmah" is an online Java applet that can
  do K-maps up to 8 inputs. It uses a slightly
  different style (overlays) than Prof. De Boer
  illustrated in class.
 
  Optional Reading on five-variable K-maps.
  Explains both the grey code style preferred by
  Prof. De Boer (so that "folding" works) and
  the overlay style that generalizes (poorly) to
  even larger K-maps.
--

2/09 ---
---

---
 
  Study for the test on Wednesday, 2/11.
10

2/06 2/09
2/13

2/16
  Read 3-8, 3-9, 3-10
  Do 3-35*, 3-42*, 3-46, 3-47*
 
  (There was a typographic error in the due date.
  On 2/11 the date was changed from 2/12 to 2/13.
9

2/04 2/06
2/09

2/13
  Read 3-5, 3-6, 3-7
  Do 3-24, 3-25, 3-21,
  3-32 except use a type '138 decoder and NAND
  (instead of OR) gates.
  Hint 1) Output a logic-1 to a LED to turn it on.
  Hint 2) Read part (b) before doing part (a).
  Hint 3) Use a block symbol for the '138
  decoder rather than drawing all the gates.
  This decoder is comparable in function to the
  the one shown in your text in Figure 3-33.
  Hint 4) Use value fixing on unneeded gate inputs.
  Note: Professor De Boer assigned this problem
  because it poses an interesting technical
  challenge, but he does not endorse gambling.
 
  Note errata on Figure 3.33
8

2/02 2/04
2/06

2/09
  Read Ch 3 Sec 3-2, 3-3, 3-4
  Do 3-2*, 3-16, 3-20
7

1/30 2/02
2/04

2/06
  Read Ch 2 Sec 2-11, Review all of Ch 2
  Read Ch 3 Sec 3-1
  Do 2-8, 2-30, 3-1
6

1/28 1/30
2/02

2/04
  Read Ch 2 Sec 2-8, 2-9, 2-10, Review 2-5
  Do 2-24, 2-25*, 2-34
5

1/26 1/28
1/30

2/02
  Read Ch 2 Sec 2-5, 2-6, 2-7
  Do 2-15*, 2-16, 2-19*, 2-31
4

1/21 1/26
1/28

1/30
  Read Ch 2 Sec 2-4
  Do 2-7*, 2-11, 2-12*, 2-14
 
  Note errata on problem 2-12*
  Note errata on page 60, Figure 2-9(b)
  Note on 2-14: "Optimize" means to "simplify"
  as shown by several examples in section 2-4.
3

1/19 1/21
1/26

1/28
  Read Ch 2 Sec 2-1, 2-2, 2-3
  Do 2-1*, 2-2*, 2-10*
2

1/16 1/19
1/21

1/26
  Read Ch 1 Sec 1-4 through 1-7
  Also read about binary prefixes from NIST
  Optional--read more about binary prefixes here.
  Do 1-10*, 1-22, 1-24, 1-25*
1

1/14 1/16
1/19

1/21
  Scan Chapter 1. Read Sections 1-2, 1-3
  Do 1-4, 1-5, 1-6, 1-7*, 1-8, 1-9*
  Note: The answer to 1-5 must be exact.

Note 1) Homework must be ready for peer grading and discussion in class on the first listed due date. It must be turned in for a final grade on the second listed due date. Peer grading will be 1/5 (20%) of the homework grade.

Note 2) Problems marked with an asterisk (*) have solutions available on the textbook's companion website.

Note 3) Homework solutions are usually available one or two class periods after the due date. Click the "returned date" on this page to access the solutions. If the "Returned" date is not a link (is black, not gold) then the solution is not yet posted. Check back later. If you click the link and get a login screen instead of the solutions, log in using your usual courses@dordt username and password. Then use the back icon (or alt-left-arrow on the keyboard) twice to get back to the link on this page and click the link again. The link only works when you are logged in to courses@dordt.

Note 4) Problems sets shown above with no "assigned" date are tentative. More problems might be added, expected due dates might change, but problems shown will eventually be assigned.

Note 5) If you are having difficulty reading the latest version of this page it may have to do with your browser's cached memory. Read this note on cached pages to solve the problem.